Epson S1C6200A manuály

Epson S1C6200A Specifikace (249 strany)

Značka: Epson | Kategorie: ne | Velikost: 1.67 MB |

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S1C62740

1

Technical Hardware

7

CONTENTS

10

Hardware

11

OVERVIEW

13

CHAPTER 1

13

Features1.1

14

S1C62740 BLOCK DIAGRAM

15

1.3 Pin Layout Diagram

16

1.4 Pin Description

18

2.1 Power Supply

19

C RA1 RA2

20

Initial Reset

21

Reset terminal

22

Simultaneous low

22

Watchdog timer

23

Internal register at

23

(TEST and CO)

23

CPU, ROM, RAMCHAPTER 3

24

EPSON I-13

25

CHAPTER 3: CPU, ROM, RAM

25

PERIPHERAL CIRCUITS AND

26

OPERATION

26

CHAPTER 4

26

EPSON I-15

27

Memory map

27

EPSON I-17

29

EPSON I-19

31

Resetting Watchdog Timer4.2

32

Control of watchdog

33

Programming note

33

Oscillation Circuit4.3

34

OSC3 oscillation

35

Control of oscillation

36

Clock frequency

37

Input Ports (K00–K03, K10)4.4

38

Interrupt function

39

Mask option

41

Control of input ports

42

EPSON I-31

43

Output Ports (R00–R03)4.5

45

• BZ and BZ

46

(R02 and R03)

46

R00 register

47

FOUT output

47

Control of output

48

EPSON I-37

49

Configuration of I/O

51

Control of I/O ports

53

Configuration of LCD

56

EPSON I-45

57

Fig. 4.7.1

57

Drive waveform

57

LCD display ON/OFF

59

(segment allocation)

60

n and SEG2

61

Clock Timer4.8

63

Control of clock

65

Stopwatch Timer4.9

68

Count-up pattern

69

Control of stopwatch

71

Programmable Timer4.10

74

K10 input

75

Down count

75

Down counter = 00H

76

Control of

78

EPSON I-67

79

PTD1 PTD0 Dividing ratio

79

Table 4.10.5

79

(SIN, SOUT, SCLK, SRDY)4.11

82

Master mode and

83

Data input/output

84

(4) SRDY signal

85

EPSON I-75

87

Table 4.11.3

88

Synchronous clock selection

88

• During writing operation

89

• During reading operation

89

A/D Converter4.12

92

• Voltage measurement

93

• Resistance measurement

93

(1) Voltage measurement

93

(3) Resistance measurement

94

DD side using a GND

95

Reference voltage

96

R1 andVR2

97

Middle electric

98

Operation of the

99

Input integration period

100

Auto zero adjustment period

100

• When the input voltage V

101

• Voltage measurement mode

102

• Resistance measurement mode

103

A/D conversion and

104

Control of the A/D

108

EPSON I-99

111

Programming notes

112

Configuration of

113

AMP circuit

113

Operation of AMP

113

Control of AMP

114

Configuration of SVD

115

SVD operation

115

Control of SVD

116

Interrupt and HALT/SLEEP

118

EPSON I-107

119

Fig. 4.15.1

119

Interrupt factor

120

Interrupt mask

121

Note: The processing in

122

Control of interrupt

123

SUMMARY OF NOTESCHAPTER 5

126

EPSON I-115

127

CHAPTER 5: SUMMARY OF NOTES

127

EPSON I-117

129

Interrupt and HALT/

130

DIAGRAM OF BASIC EXTERNAL

131

CONNECTIONS

131

CHAPTER 6

131

7.1 Absolute Maximum Rating

133

DC Characteristics

134

R2 are not included

136

Zero point error E

137

Porality error E

137

Linearity error EL

137

Input voltage range

140

OSC3 CR oscillation circuit

141

PACKAGECHAPTER 8

142

QFP15-100pin

143

(Unit: mm)

144

PAD LAYOUTCHAPTER 9

145

9.2 Pad Coordinates

146

Software

147

INTRODUCTION

153

BLOCK DIAGRAM

154

CHAPTER 2

154

PROGRAM MEMORY (ROM)CHAPTER 3

155

DATA MEMORYCHAPTER 4

156

EPSON II-5

157

CHAPTER 4: DATA MEMORY

157

Fig. 4.1.1

157

Data memory map

157

Detail Map of the I/O Memory

158

EPSON II-7

159

EPSON II-9

161

INITIAL RESETCHAPTER 5

162

Initialization

163

CHAPTER 5: INITIAL RESET

164

CHAPTER 6 PERIPHERAL CIRCUITS

165

Example program

166

Programing notes

166

I/O data memory of

167

Control of the OSC3

167

Control of the input

170

Output Ports (R00–R03)6.4

174

Control of the

176

Control of the I/O

179

EPSON II-29

181

Fig. 6.5.2

181

Control of I/O port (Input)

181

Fig. 6.5.3

182

Control of I/O port (Output)

182

Serial I/O port

183

LCD Driver6.6

184

Register

185

DisplayA resister

186

Clock Timer6.7

188

Stopwatch Timer6.8

191

EPSON II-41

193

Programmable Timer6.9

195

Programmable timer control

197

Programmable timer data

197

Programmable timer interrupt

197

Timer data

198

Timer overflow (reload)

198

EPSON II-47

199

Serial Interface Circuit6.10

201

Serial data output

202

Serial data input

202

EPSON II-53

205

Amplifier6.11

207

Control of the SVD

209

A/D Converter6.13

211

Feature of the A/D

212

(even though ADON

213

EPSON II-63

215

Sleep6.14

217

EPSON II-67

219

Interrupt6.15

221

Fig. 6.15.1

222

EPSON II-73

225

SUMMARY OF NOTESCHAPTER 7

228

EPSON II-77

229

CHAPTER 7: SUMMARY OF NOTES

229

EPSON II-79

231

Serial interface

232

EPSON II-81

233

APPENDIX A

234

EPSON II-83

235

RAM map - 2 (100H–17FH)

235

RAM map - 3 (200H–27FH)

236

EPSON II-85

237

RAM map - 4 (300H–37FH)

237

B S1C62740 INSTRUCTION SET

239

Instruction set - 2

240

EPSON II-89

241

Instruction set - 3

241

Symbols associated with

242

EPSON II-91

243

ASSEMBLER

244

D COMMAND TABLE OF ICE

245

ICE command table - 2

246

Epson IS energy savings

248

Epson S1C6200A Specifikace (191 strany)

Značka: Epson | Kategorie: ne | Velikost: 1.11 MB |

Angličtina

Tabulka s obsahem

S1C6S2N7

1

Technical Hardware

7

CONTENTS

10

Hardware

11

INTRODUCTION

13

CHAPTER 1

13

Features

14

Core CPU S1C6200A

15

Pin Layout Diagram

16

Pin Description

17

Power Supply

18

Fig. 2.1.2

19

External elements when

19

LCD system regulated

19

Initial Reset

20

Table 2.2.1

21

Input port combinations

21

Table 2.2.2

21

Simultaneous high input

21

Test Pin (TEST)

22

CPU, ROM, RAM

23

CHAPTER 3

23

Fig. 3.2.1

24

ROM configuration

24

PERIPHERAL CIRCUITS

25

AND OPERATION

25

Table 4.1.1(a) I/O memory map

26

Table 4.1.1(b) I/O memory map

27

Table 4.1.1(c) I/O memory map

28

Table 4.1.1(d) I/O memory map

29

Table 4.1.1(e) I/O memory map

30

Oscillation Circuit

31

Input Ports (K00–K03)

32

Data bus

33

Mask option

34

Control of input port

35

Output Ports (R00–R03)

37

EPSON I-27

39

Control of output

40

R00 register

41

FOUT output

41

R01 (R00) register

42

BUZZER output

42

I/O Ports (P00–P03)

43

I/O control register

44

Control of I/O port

44

Configuration of LCD

47

Frame frequency

48

Fig. 4.6.2

49

Drive waveform for

49

1/3 duty (1/3 bias)

49

Fig. 4.6.3

50

1/2 duty (1/3 bias)

50

LCD lighting status

51

Fig. 4.6.7

53

LCD static drive waveform

53

Fig. 4.6.8

54

Segment allocation

54

EPSON I-43

55

Fig. 4.6.9

56

Clock Timer

57

Frequency

58

Register

58

Control of clock

59

Stopwatch Timer

61

Count-up pattern

62

Interrupt function

63

Control of stopwatch

64

EPSON I-53

65

Configuration of SVD

67

Operation of SVD

69

Operation of heavy

70

Control of SVD cir

71

Stepping Motor Driver

73

Drive pulse

74

Control of motor

75

Interrupt and HALT

77

Interrupt flag

78

Interrupt factors

79

Specific masks and

80

CPU system clock

81

Control of interrupt

82

EPSON I-71

83

BASIC EXTERNAL WIRING DIAGRAM

84

CHAPTER 5

84

S1C6S2N7/6S2A7

85

6S2B7/6S2L7

85

6.1 Absolute Maximum Rating

86

S1C6S2A7

87

S1C6SL27

88

S1C6S2B7

88

6.3 DC Characteristics

89

EPSON I-79

91

EPSON I-81

93

EPSON I-83

95

S1C6SL27/S1C6S2B7

97

S1C6S2N7 (CR oscillation)

98

S1C6S2A7 (CR oscillation)

98

S1C6S2B7 (CR oscillation)

98

Unless otherwise specified

99

CD=built-in, Ta=25°C

99

7.1 Plastic Package

100

QFP6-60pin

101

8.1 Diagram of Pad Layout

102

8.2 Pad Coordinates

103

Technical Software

105

Software

109

S1C6S2N7 Block Diagram

111

Program start address

112

Interrupt vector area

112

Program area

112

Interrupt Vectors

113

Data Memory Map

114

EPSON II-5

115

CHAPTER 1: CONFIGURATION

115

EPSON II-9

119

INITIAL RESET

120

CHAPTER 2

120

EPSON II-11

121

CHAPTER 2: INITIAL RESET

121

Initialize Program Example

122

Enable interrupt

123

Reset register flags

123

Fig. 2.2.1

123

Input Ports

124

Control of

125

Examples of input

125

Disable interrupt

126

Set address of port

126

Output Ports3.2

127

Examples of output

128

EPSON II-19

129

Special Use Output Ports3.3

130

Control of the spe

131

Examples of special

132

EPSON II-23

133

3.4 I/O Ports

134

Examples of I/O port

136

EPSON II-27

137

LCD Driver3.5

139

Control of the LCD

140

Fig. 3.5.3

141

7-segment LCD assignment

141

Fig. 3.5.2

141

1/1 duty drive control

141

(1/3 bias)

141

Examples of

142

LCD driver control

142

D3 D2 D1 D0

143

3.6 Timer

144

Control of the timer

145

Examples of timer

146

EPSON II-37

147

3.7 Stopwatch Timer

148

Control of the stop

149

Examples of stop

150

B register

151

A register

151

SVD circuit and

152

Control of the SVD

153

Example of SVD

153

Heavy load protec

154

EPSON II-45

155

Examples of heavy

156

EPSON II-47

157

Fig. 3.8.4

158

Flowchart of operation

158

3.9 Motor Driver

159

Control of the motor

160

Examples of motor

160

3.10 Interrupt and Halt

161

Control of interrupts

163

Fig. 3.10.1

164

Input interrupt circuit

164

Fig. 3.10.2

165

Timer interrupt circuit

165

Fig. 3.10.3

166

Stopwatch interrupt circuit

166

Fig. 3.10.4

167

Port K input

168

Factor flag set Not set

168

Mask register

168

Active status

168

EPSON II-59

169

Fig. 3.10.6

170

Assignment of the interrupt

170

Table 3.10.2

171

Interrupt vector map

171

Fig. 3.10.7

172

Internal interrupt circuit

172

Examples of interrupt

173

EPSON II-65

175

CHAPTER 4

176

SUMMARY OF PROGRAMMING

176

EPSON II-69

179

EPSON II-71

181

Registers specified

183

EPSON II-75

185

EPSON II-77

187

EPSON II-79

189

Technical Manual

191

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