Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Uživatelský manuál Strana 12

  • Stažení
  • Přidat do mých příruček
  • Tisk
  • Strana
    / 181
  • Tabulka s obsahem
  • KNIHY
  • Hodnocené. / 5. Na základě hodnocení zákazníků
Zobrazit stránku 11
2 REGISTERS
4
EPSON
S1C33 FAMILY C33 PE CORE MANUAL
2 Registers
The C33 PE Core contains 16 general-purpose registers and 8 special registers.
R15
R14
R13
R12
R11
R10
R4
R5
R6
R7
R8
R9
R3
R2
R1
R0
bit 31 bit 0
General-purpose registers
PC
TTBR
bit 31
#15
#11
#10
#8
#3
#2
#1
#0
#15
#14
#13
#12
#11
#10
#9
#8
#7
#6
#5
#4
#3
#2
#1
#0
bit 0
AHR
ALR
PSR
SP
IDIR
DBBR
Special registers
Figure 2.1 Registers
2.1 General-Purpose Registers (R0–R15)
Symbol
R0–R15
Size
32 bits
Initial value
Indeterminate
Register name
General-Purpose Register
R/W
R/W
The 16 registers R0–R15 (r0–r15) are the 32-bit general-purpose registers that can be used for data manipulation,
data transfer, memory addressing, or other general purposes. The contents of all of these registers are handled as
32-bit data or addresses, so 8- or 16-bit data is sign- or zero-extended to a 32-bit quantity when it is loaded into one
of these registers depending on the instruction used. When these registers are used for address references in the C33
PE Core, 32-bit space can be accessed directly.
During initialization at power-on, the contents of the general-purpose registers are indeterminate.
2.2 Program Counter (PC)
Symbol
PC
Size
32 bits
Initial value
Indeterminate
Register name
Program Counter
R/W
R
The Program Counter (hereinafter referred to as the PC) is a 32-bit counter for holding the address of an
instruction to be executed. More specifically, the PC value indicates the address of the next instruction to be
executed.
As the instructions in the C33 PE Core are fixed at 16 bits in length, the low-order one bit of the PC (bit 0) is always 0.
Although the C33 PE Core allows the PC to be referenced in a program, the user cannot alter it. Note, however,
that the value actually loaded into the register when a
ld.w %rd,%pc instruction (can be executed as a delayed
instruction) is executed is the PC value for the
ld instruction + 2.
During reset, the address written at the reset vector in the vector table indicated by TTBR is loaded into the PC, and
the processor starts executing a program from the address indicated by the PC.
During cold reset, TTBR is initialized to 0xC00000, so that the address written at the address 0xC00000 is the
start address of the program.
Figure 2.2.1 Program Counter (PC)
Zobrazit stránku 11
1 2 ... 7 8 9 10 11 12 13 14 15 16 17 ... 180 181

Komentáře k této Příručce

Žádné komentáře