Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Uživatelský manuál Strana 5

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CONTENTS
S1C33 FAMILY C33 PE CORE MANUAL
EPSON
i
– Contents –
1 Summary ........................................................................................................................
1
1.1 Features ............................................................................................................................ 1
1.2 Summary of Added/Changed Functions of the C33 PE .................................................... 2
1.2.1 Instructions ......................................................................................................... 2
1.2.2 Registers .............................................................................................................
3
1.2.3 Address Space and Other ..................................................................................
3
2 Registers ........................................................................................................................ 4
2.1 General-Purpose Registers (R0–R15) .............................................................................. 4
2.2 Program Counter (PC) ...................................................................................................... 4
2.3 Processor Status Register (PSR) ...................................................................................... 5
2.4 Stack Pointer (SP) ............................................................................................................. 7
2.4.1 About the Stack Area .......................................................................................... 7
2.4.2 SP Operation during Execution of
Push
-Related Instructions ............................ 7
2.4.3 SP Operation during Execution of
Pop
-Related Instructions .............................. 8
2.4.4 SP Operation during Execution of a
Call
Instruction ........................................ 8
2.4.5 SP Operation when an Interrupt or Exception Occurs ........................................
9
2.5 Trap Table Base Register (TTBR) .....................................................................................
10
2.6 Arithmetic Operation Registers (ALR and AHR) .............................................................. 10
2.7 Processor Identification Register (IDIR) ........................................................................... 10
2.8 Debug Base Register (DBBR) .......................................................................................... 10
2.9 Register Notation and Register Numbers ........................................................................ 11
2.9.1 General-Purpose Registers ............................................................................... 11
2.9.2 Special Registers ...............................................................................................
12
3 Data Formats ................................................................................................................. 13
3.1 Unsigned 8-Bit Transfer (Register Register) ................................................................ 13
3.2 Signed 8-Bit Transfer (Register Register) .................................................................... 13
3.3 Unsigned 8-Bit Transfer (Memory Register) ................................................................. 14
3.4 Signed 8-Bit Transfer (Memory Register) ..................................................................... 14
3.5 8-Bit Transfer (Register Memory) ................................................................................. 14
3.6 Unsigned 16-Bit Transfer (Register Register) .............................................................. 14
3.7 Signed 16-Bit Transfer (Register Register) .................................................................. 15
3.8 Unsigned 16-Bit Transfer (Memory Register) ............................................................... 15
3.9 Signed 16-Bit Transfer (Memory Register) ................................................................... 15
3.10 16-Bit Transfer (Register Memory) ............................................................................. 15
3.11 32-Bit Transfer (Register Register) ............................................................................ 16
3.12 32-Bit Transfer (Memory Register) ............................................................................. 16
3.13 32-Bit Transfer (Register Memory) ............................................................................. 16
4 Address Map ................................................................................................................. 17
5 Instruction Set ..............................................................................................................
18
5.1 S1C33-Series-Compatible Instructions ............................................................................ 18
5.2 Function Extended Instructions ........................................................................................ 20
5.3 Instructions Added to the C33 PE Core ........................................................................... 21
5.4 Instructions Removed ...................................................................................................... 21
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